Kirjasto - Tampereen teknillinen yliopisto

Browsing by Department "Tietokonetekniikan laitos – Department of Computer Systems"

Sort by: Order: Results:

  • Application of Particle Filters to a Map-Matching Algorithm 
    Davidson, Pavel; Collin, Jussi; Takala, Jarmo (2011)
    This paper presents the numerical probabilistic approach to map-matching problem within the framework of Bayesian theory. The proposed solution is based on sequential Monte Carlo method, so called particle filtering. This ...
  • ASIP Integration and Verification Flow 
    Esko, Otto (2011-06-08)
  • Augmenting IP blocks for verification and optimization 
    Arvio, Juha (2012-05-09)
    The verification of digital intellectual property (IP) blocks has always been a challenge. Simple IP blocks with straightforward test inputs, can be quite thoroughly verified with software simulators such as Modelsim. But ...
  • A Co-Design Flow for Application-Specific Multicores 
    Jääskeläinen, Pekka; Salminen, Erno; Sanchez de La Lama, Carlos; Takala, Jarmo; Ignacio Martinez, Jose (2011)
    Contemporary embedded systems are often designed as Multiprocessor System-on-Chips (MPSoC) which include multiple processors and other peripherals on a single chip. In contrast to general purpose multiprocessors, the design ...
  • Customizable datapath integrated lock unit 
    Jääskeläinen, Pekka; Salminen, Erno; Esko, Otto; Takala, Jarmo (2011)
    Multicore Application-Specific Instruction-Set Processors (MCASIP) offer an interesting alternative for implementing parallel applications in MPSoCs. Flexible MCASIP architecture templates allow matching the instruction ...
  • Customized exposed datapath soft-core design flow with compiler support 
    Esko, Otto; Jääskeläinen, Pekka; Huerta, Pablo; de La Lama, Carlos S.; Takala, Jarmo; Martinez, Jose Ignacio (2010)
    A popular way to exploit high level programming languages in FPGA designs is to use a soft-core with accompanying software development tools. However, a common shortcoming with the current soft-core offerings is their ...
  • Design and Implementation of Configurable Motion Estimation Architecture for Video Encoding 
    Vanne, Jarno Johannes (2011-09-23)
    A key factor behind the success of video products and services is video compression that makes digital video practical in the current communication networks and storage devices. However, video compression involves complex ...
  • Designing Exercise Work for System-on-Chip Course 
    Sadeharju, Jukka (2012-08-15)
    Multiprocessor systems have become very popular system design during last decades.That is consequence of need for more and more efficient systems with low physical space. This kind of systems need several different system ...
  • Design Methodology for Offloading Software Executions to FPGA 
    Patyk, Tomasz; Salmela, Perttu; Pitkänen, Teemu; Jääskeläinen, Pekka; Takala, Jarmo (2011)
    Field programmable gate array (FPGA) is a flexible solution for offloading part of the computations from a processor. In particular, it can be used to accelerate an execution of a computationally heavy part of the software ...
  • Design of a Reconfigurable Multi-Core Architecture for Streaming Applications 
    Ghazanfari, Leyla S. (2012-06-06)
    This thesis presents design of a reconfigurable multi-processor architecture.The architecture is composed of 9 nodes interconnected to each other through a 3x3 mesh-based Network-on-Chip. The central node of the architecture ...
  • Designs for the Quality of Service Support in Low-Energy Wireless Sensor Network Protocols 
    Suhonen, Jukka (2012-08-24)
    A Wireless Sensor Network (WSN) consists of small, low cost, and low energy sensor nodes that cooperatively monitor physical quantities, control actuators, and perform data processing tasks. A network may consist of thousands ...
  • Doppler Radar and MEMS Gyro Augmented DGPS for Large Vehicle Navigation 
    Parviainen, Jussi; Kirkko-Jaakkola, Martti; Davidson, Pavel; Vazquez-Lopez, Manuel A.; Collin, Jussi (2011)
    This paper presents the development of a land vehicle navigation system that provides accurate and uninterrupted positioning. A ground speed Doppler radar and one MEMS gyroscope are used to augment differential GPS (DGPS) ...
  • Floating Point Arithmetic for Transport Triggered Architectures 
    Viitanen, Timo Tapani (2012-12-05)
    Laskentajärjestelmiin kohdistuu usein suorituskyky- ja virrankulutusvaatimuksia, joita ei pystytä saavuttamaan yleiskäyttöisellä prosessorilla. Toistaalta laitteistokiihdyttimien suunnittelu voi vaatia kohtuuttoman paljon ...
  • From Parallel Programs to Customized Parallel Processors 
    Jääskeläinen, Pekka (2012-11-08)
    The need for fast time to market of new embedded processor-based designs calls for a rapid design methodology of the included processors. The call for such a methodology is even more emphasized in the context of so called ...
  • Gateway Adapters for Integrating Wireless Sensor Networks 
    Taatila, Ossi (2012-10-03)
    Wireless sensor networks have grown more and more popular in the past few years. There are sensor networks available from several manufacturers. A wireless sensor network is usually tailored for a certain purpose and because ...
  • Hybrid modeling of intra-DCT coefficients for real-time video encoding 
    Li, Jin; Gabbouj, Moncef; Takala, Jarmo (2008)
    The two-dimensional discrete cosine transform (2-D DCT) and its subsequent quantization are widely used in standard video encoders. However, since most DCT coefficients become zeros after quantization, a number of redundant ...
  • Impact of software bypassing on instruction level parallelism and register file traffic 
    Guzma, Vladimir; Jääskeläinen, Pekka; Kellomäki, Pertti; Takala, Jarmo (2008)
    Software bypassing is a technique that allows programmer-controlled direct transfer of results of computations to the operands of data dependent operations, possibly removing the need to store some values in general purpose ...
  • Instruction Buffer with Limited Control Flow and Loop Nest Support 
    Guzma, Vladimir; Pitkänen, Teemu; Takala, Jarmo (2011)
    In this work, we present a minimalistic, energy efficient implementation of instruction buffer. We use loop detection and execution trace analysis to find most commonly executed loops in already scheduled application and ...
  • Käyttöjärjestelmän edut langattomassa anturiverkossa 
    Onkila, Juha Matti Tapani (2011-06-08)
  • Library management implementation on Kactus2 IP-XACT tool 
    Kamppi, Antti (2012-12-05)
    The size and complexity of embedded systems have grown at an accelerating pace over the last years. This causes demand to improve the productivity of the design process e.g. by enhancing the reusability of logic components, ...