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URN:
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http://URN.fi/URN:NBN:fi:tty-201201181010
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Title:
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Instruction Buffer with Limited Control Flow and Loop Nest Support |
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Author:
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Guzma, Vladimir; Pitkänen, Teemu; Takala, Jarmo |
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Publication type:
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Konferenssijulkaisu - Conference paper |
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Issue date:
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2011 |
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DOI:
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http://dx.doi.org/10.1109/SAMOS.2011.6045470
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Description:
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© 2011 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works |
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University:
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Tampereen teknillinen yliopisto - Tampere University of Technology |
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Faculty:
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Tieto- ja sähkötekniikan tiedekunta – Faculty of Computing and Electrical Engineering |
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Department:
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Tietokonetekniikan laitos – Department of Computer Systems |
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Abstract:
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In this work, we present a minimalistic, energy efficient implementation of instruction buffer. We use loop detection and execution trace analysis to find most commonly executed loops in already scheduled application and tailor instruction buffer size to the size of most commonly executed loop(s). In addition to our previous work, we allow buffering of loops with limited control flow (early exit from the loop or early return to the beginning of the loop). We also show how analysis of loop nests can decrease the number of times loop body is copied from memory into the buffer. Our results show that in case of favorable loop nest, we can execute all but initial loop iterations from the instruction buffer, keeping instruction memory in the deselect mode. |
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Copyright:
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This publication is copyrighted. You may download, display and print it for Your own personal use. Commercial use is prohibited. |