Design of a DMA device for an efficient data transfer in streaming multimedia applications

Abstract

In the thesis it was designed a Direct Memory Access (DMA) device for a runtime reconfigurable coprocessor. Thia DMA should provide an efficient data transfer in order to exploit the high parallelism of the coprocessor. Three versions of the system with the DMA have been implemented each with different system bus management policies. It was successfully performed one simple matrix-vector multiplication on the coprocessor to test the new device and a low-pass filter for white and black image to prove the usability of the new device in streaming multimedia applications. In both of those applications it was achieved an important speed-up against a very little area overhead, just 1 % of the total area occupied by the coprocessor in a Field-programmable gate array (FPGA) implementation. Finally it was worked on the implementation of an Fast Fourier Transform (FFT) algorithm on the reconfigurable coprocessor, obtaining a scalable implementation.