Design and implementation of a parameterized DSP core

Abstract

The use of digital signal processors has increased dramatically and will continue to grow due to the use of digital signal processing (DSP) algorithms in various applications. In addition, the development in integrated circuit manufacturing has allowed the integration of more and more complex systems on a single silicon chip. One way to realize a complex system with a single chip is to implement it using a DSP core. A DSP core is a DSP processor which is intended to be used as a building block in integrated circuit design. Memories, peripherals and application specific logic are added to obtain the complete chip. This thesis presents a parameterized DSP core. In a parameterized DSP core the main features of the processor such as data and address word widths can be varied. With the parameters, the processor performance can be tailored to suit different applications. Common software tools can be used for the entire processor family. VSDSP processor was implemented using a combination of full-custom and standard cell layout techniques. The implementation was verified at the various stages of implementation to obtain correct behaviour. The verification was done with a test suite. The results were compared to those obtained from a high-level processor simulator.