Implementation of perfect reconstruction Cosine-Modulated Filter Banks using digital signal processor

Abstract

The purpose of this thesis is to present performance evaluation for the extended lapped transform implemented on a single fixed point DSP. The TMS320C62xx signal processor family with VLIW architecture provides a powerful C compiler, which can produce more optimised DSP code by figuring out the parallel operations in the algorithm and scheduling them to be executed in parallel. The improved results will then be used to evaluate the performance of ELT filter banks with different number of channels and stop band attenuations. /Kir10