Kirjasto - Tampereen teknillinen yliopisto

Virtual prototyping in system level co-design

Show simple item record

Title: Virtual prototyping in system level co-design
Author: Hiironniemi, Tero
Abstract: During the last few years the product life cycle has shortened radically. Consequently, new products are introduced and launched into the markets in ever hastening pace. However, productivity of traditional design method is not evolving as fast. These three factors have influenced on the system design. Requirements for shortening the time spent in the system design process have become more important. At the same time the complexity of the systems has grown to certain point, that a single designer could not comprehend the detailed functionally of the system. This leads to quality problems and delayed project schedules. To increase the amount of design personnel could not solve the problem, because costs will be huge and design time would still be too long. One solution is to utilise computers to produce models and execute the system model. The most recent hardware/software co-design tools can provide an easy way to construct a virtual prototype of the system. With this virtual prototype, it is possible to determine systems behavioural and performance, and iteratively search the best implementation solution. Cadences VCC is among the first tool, which can support this kind of design methodology even for very complex systems. At the same time, this virtual prototype can also act as a base for software and hardware development. During software and hardware design process, virtual prototype gets refined and more details are included to it gradually. After designing the system, in the integration phase, virtual prototype gets refined and more details are included to it gradually. After designing the system, in the integration phase, virtual prototype can be used as a co-verification platform. This thesis presents the virtual prototype based co-design flow and how VCC can be used among this process. Methodology itself is useful for SoC solutions since it combines heterogeneous modelling techniques. The main problem is still lack of the industrial standard for interface between simulators and IP blocks. VCC could act as an industrial standard as well as some other system level tool, but at the moment there is no IP vendors who support VCC modelling style. /Kir10
Comment: TTY:n kirjastossa laadittu tiivistelmä
Issue date: 1999
URN: http://URN.fi/URN:NBN:fi:tty-200907104311
Publication type: Diplomityö
Language: eng
Pages: 78 s
University: Tampereen teknillinen korkeakoulu
Faculty: Sähkötekniikan osasto
Department: Elektroniikan laitos
Degree Programme:

Files in this item

Files Size Format View

There are no files associated with this item.

This item appears in the following Collection(s)

Show simple item record

Search TUT DPub


Advanced Search

Browse

My Account

Statistics